1. Field of the Invention
The present invention relates to an active matrix liquid crystal display element which includes pixel transistors for individually performing writing control on each pixel.
2. Description of the Related Art
With rapid progress in technology for producing large-sized, high-resolution, high-picture-quality liquid crystal display elements (LCD elements), many attempts have been made in recent years to meet various requirements arising in the production of such LCD elements. For improved picture quality, image flicker reduction is particularly important, because flicker becomes an increasingly serious problem in view of the recent trend toward large-sized, high-resolution LCD elements.
More specifically, in an active matrix LCD element, which includes a transistor (hereinafter referred to as “pixel transistor”) provided for every pixel for independently controlling writing of a source signal (video signal) in the pixel, the so-called feed-through voltage is generated when a pixel transistor is turned OFF. In an LCD element of a larger size and higher resolution, a pulse input to the gate electrode of each pixel transistor has a substantially rectangular waveform at a supply end thereof (hereinafter referred to as “gate signal supply end”), while it has around waveform at a terminal end thereof (hereinafter referred to as “gate signal terminal end”) because of high load, which leads to a noticeable phenomenon called “recharging” at the gate signal terminal end. The generation of the feed-through voltage combined with the recharging phenomenon results in such a situation that where gate lines extend laterally on the image display plane (hereinafter referred to as “screen”), the potential maintained by the pixels on the right side of the screen differs from that on the left side. In this case, when an opposed potential (a potential of an opposed electrode) is determined so as to apply the same voltage to the even numbered frames and odd numbered frames of the LCD element, the value of the opposed potential varies according to locations in the screen. In such a case, the average value is normally set, which causes a shimmering phenomenon called flicker in the locations where the difference between an even numbered frame and an odd numbered frame in the voltage applied to the LCD element exceeds an allowable range. This is a serious drawback in picture quality. An attempt to solve this problem is disclosed, for instance, in Japanese Patent Kokai Publication Nos. 5-232509 (1993) and 11-84428 (1999). According to the attempt, flicker is reduced by setting the values of capacitances of a storage capacitor and a capacitor formed between the gate electrode and pixel electrode of a pixel transistor (hereinafter referred to as “gate electrode to pixel electrode capacitor) so as to slightly vary depending on locations in the screen, based on the fact that they affect the feed-through voltage.
However, even if capacitances of the storage capacitor and the gate electrode to pixel electrode capacitor are set in the manner described above, the actual values of the capacitances sometimes are not equal to their respective design values. Since the feed-through voltage affects the potential which is finally maintained by the pixels and is dependent of the capacitances of the storage capacitor and the gate electrode to pixel electrode capacitor, the potential maintained by the pixels will vary if the values of these capacitances vary. If the potential variation is uniform throughout the screen, flicker can be prevented by simply readjusting the opposed potential so as to apply the same voltage to the even numbered frames and odd numbered frames of the LCD element. On the other hand, in cases where the degree of the potential variation is not uniform within the screen, even if the opposed potential is adjusted so as to apply the same voltage to the even numbered and odd numbered frames of the LCD element, different voltages are unavoidably caused in the even numbered and odd numbered frames of the LCD element in some regions. This is, in consequence, observed as flicker. One of the causes of variations in the capacitances of the storage capacitor and the gate electrode to pixel electrode capacitor is that when forming the patterns of the gate electrodes, pixel electrodes and others which define the capacitance of the storage capacitor and the gate electrode to pixel electrode capacitor, the photomasks for these patterns are improperly aligned so that the area of the overlapped region where these patterns are overlapped through insulating films deviates from its design value. Japanese Patent Kokai Publication Nos. 6-67199 (1994) and 8-8432 (1996) have proposes a method for solving this problem. In these publications, pixel electrodes and gate electrodes intersect each other in cross form so that the values of the capacitances are not affected by the misalignment of the photomasks. An alternative is disclosed, for instance, in Japanese Patent Kokai Publication No. 5-119347 (1993), according to which two transistors are connected in parallel and the first transistor and the second transistor are arranged so as to be connected to the source electrode and the drain electrode respectively, such that the vertical relationship between the source and drain electrodes is reversed, thereby compensating for the misalignment of the photomasks.
The methods described earlier are made on assumption that misalignment occurs only in directions parallel with and perpendicular to the gate lines and are effective as far as misalignment occurs in such directions. In fact, when misalignment occurs only in parallel with or perpendicularly to the gate lines, flicker is unlikely to reach a problematic level so that there is no need to take the above methods. The reason for this is that such misalignment occurs in a uniform manner within the screen in principle and can be basically eliminated by adjusting opposed potential. There are, however, other cases. For instance, since reticles (photomasks) and array substrates (active matrix substrates) have certain temperatures or certain coefficients of mechanical expansion, the variations in the capacitances of the storage capacitor and the gate electrode to pixel electrode capacitor which correspond to misalignment may consequently fluctuate within the screen under a certain condition in which temperature fluctuation, reticle or substrate deflection, or the like occurs. Further, where a pattern for image display regions of an array substrate is formed by repeating exposure a plurality of times with a stepper as shown in Japanese Patent Kokai Publication No. 2000-2889, the degree of misalignment may vary according to the exposed regions. It is conceivable that the above-described methods are suited for use in these cases.
Another major cause of variations in the capacitances of the storage capacitor and the gate electrode to pixel electrode capacitor is deviation of the widths of patterns for the gate electrodes, the pixel electrodes and others from their design values, the deviation being caused by poor controllability in a photolithography or etching process. The above-described conventional methods cannot solve this problem which is more serious than the misalignment of the photomasks.
Up to now, there have been proposed no effective means in design, as a method for solving the above problem. Therefore, increases in flicker are somehow limited to an allowable range by restricting variations in the capacitances of the storage capacitor and the gate electrode to pixel electrode capacitor in the screen by improving the accuracy of photolithography techniques and processing techniques such as dry etching and wet etching in the fabrication process of the array substrate. However, with recent progress in the development of large-sized, high-resolution, high-picture-quality LCD elements, the allowable range for the level of flicker becomes more and more strict so that the conventional processing techniques no longer successfully restrict the level of flicker within the allowable range.